BS EN 60191-6 is the sixth part of a multi-series standard used for the Mechanical standardization of semiconductor devices. This helps in protecting these devices from external factors.
BS EN 60191-6 gives general rules for the preparation of outline drawings for surface-mounted semiconductor devices. It supplements IEC 60191-1 and IEC 60191-3. It covers all surface-mounted devices discrete semiconductors with a lead count of greater or equal to 8, as well as integrated circuits classified as form E in Clause 3 of IEC 60191-4.
BS EN 60191-6 on Preparing the outline drawings for surface mounted semiconductor device packages is useful for:
A semiconductor device is an electronic component that contains the electronic properties of semiconductor material. The packing of these surface mounted semiconductor devices is useful in protecting the materials while transporting, storing, and handling these devices.
BS EN 60191-6 specifies the rules for designing these devices in a systematic manner. The dimensions specified are useful in designing these surface mounted semiconductor device packages. With the help of these dimensions, you can identify the materials to be used while packing these devices.
BS EN 60191-6 can be your best guide in preparing the outline drawings for surface mounted semiconductor device packages. By applying BS EN 60191-6, you can protect these devices from external factors.
BS EN 60191-6:2009 supersedes BS EN 60191-6:2004. BS EN 60191-6:2009 includes some technical changes with respect to BS EN 60191-6:2004. These include:
EN 60191-6:2009
EN 61755-2-2:2006
IEC 60191-6:2009
IEC 61755-2-2:2006