BS EN IEC 62433-6 discusses EMC IC modelling. BS EN IEC 62433-6 is the sixth part of the BS EN IEC 62433 series of standards which is applicable to models of integrated circuits for Pulse immunity behavioural simulation - Conducted Pulse Immunity (ICIM-CPI). BS EN IEC 62433-6 describes the extraction flow for deriving an immunity macro-model of an Integrated Circuit (IC) against conducted Electrostatic Discharge (ESD) according to IEC 61000-4-2 and Electrical Fast Transients (EFT) according to IEC 61000-4-4.
BS EN IEC 62433-6 provides:
BS EN IEC 62433-6 on Electromagnetic compatibility Integrated circuits (EMC IC) modelling is useful for:
With shrinking transistors and lower operating voltages, the IC manufacturers and users have especially to take care of the immunity of their products too fast transient electrical stresses such as ElectroStatic Discharge (ESD) and Electrical Fast Transient (EFT). An ESD may be caused by component handling or assembly.
An Electrical Fast Transient (EFT) may be caused by a switching event. The amplitude of these stresses ranges from hundreds of Volts to several tens of kV and/or from a few Amperes to tens of Amperes, their duration from tens to hundreds of nanoseconds. To prevent the failure of electronic products due to transient stresses, various tests have been designed. The modelling approach allows simulating device failure due to ElectroStatic Discharge (ESD) or Electrical Fast Transient (EFT) at component and system level considering all components necessary for the immunity simulation of an IC, such as a PCB or external protection elements.
BS EN IEC 62433-6 provides Integrated Circuit Immunity Model Conducted Pulse Immunity (ICIM-CPI) model which addresses physical damages due to overvoltage, thermal damage and other failure modes. Functional failures can also be addressed.
BS EN IEC 62433-6 provides an Integrated Circuit Immunity Model Conducted Pulse Immunity (ICIM-CPI) that allows the immunity simulation of the IC in an application.
BS EN IEC 62433-6 described Integrated Circuit Immunity Model Conducted Pulse Immunity (ICIM-CPI) approach which is suitable for modelling analogue, digital and mixed-signal ICs. Several terminals of an IC can be part of a single model (e.g. input, output and supply pins). The implementation of the model is capable of representing the non-linear behaviour of overvoltage protection circuits
BS EN IEC 62433-6 demonstrates, in detail, the construction of models in a defined XML-based format which is suitable for the exchange of models without any deeper knowledge of the semiconductor circuit. However, the model function can be implemented in different formats including, but not limited to, tables, SPICE netlists, hardware description languages such as VHDL-AMS and Verilog-AMS.
EN 62433-6
IEC 62433-6